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Abteilung Betriebssysteme und Verteilte Systeme |
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| Author: | Michael Wachs |
| Title: | Untersuchung und Implementierung von Mechanismen zur Interprozessorkommunikation |
| Kind of Publication: | Diplomarbeit |
| Supervisor: | Prof. Dr. G. Stiege, Ingo Stierand |
| Date: | August 1997 |
| Institution: | Universität Hildesheim, FB 4 - Informatik, Institut für Betriebssysteme und Rechnerverbund |
| Pages, Language | 106, German |
| Keywords: | Operating Systems, Communication, Synchronisation |
| CR Classification: | B.4.3 [Interconnections (Subsystems)], C.2.2 [Network Protocols], D.4.4 [Communications Management] |
| General Terms (ACM): |
There exist limits for the increase of the performance of single processor systems. Further increases can be achieved by breaking tasks into smaller parts (parallelization) and by distributing them across several processors or computers. To solve the whole task efficiently, the processors or computers working on partial tasks have to communicate. During the last years, two types of computers integrating several processors in one system have been created: multiprocessor systems and multicomputer systems. In a multiprocessor system several processors share the same memory and work on tasks while communicating via the shared memory. In a multicomputer system separate computers have their own memory and only cooperate on tasks by communicating via special devices. A bus serves as a medium for the communication between the processors and the memory in a multiprocessor system, or between the computers in a multicomputer system. The bus is equipped with data and control lines of differing bit widths, speeds, and signal count. With increasing number of processors or computers in such a system, the kind of coupling between processors and memory as well as the type of connection between the system components (bus topology) are of growing importance for efficient use of the bandwidth of the communication channels. This work elaborates on the coupling and connection types in the multiprocessor and multicomputer systems and on the mechanisms for interprocess communication with special accent on multiprocessor systems. One important component of these mechanisms is the way to achieve memory coherence. In closing, a protocol for interprocess communication is developed and implemented, which is running in a multiprocessor system based on the Siemens 83C166 microcontrollers.
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Last change: Jul 28 13:39:58 MET DST 1998 Stiege |